Working with the Signal Top Value Design Rule on a PCB in Altium Designer

Rule category: Signal Integrity

Rule classification: Unary

Summary Copy Link Copied

This rule specifies the minimum voltage level that a signal can settle to in the high state (the top value).

Constraints Copy Link Copied

Default constraints for the Signal Top Value rule.

• Minimum (Volts) - the value for the minimum permissible top value voltage.

How Duplicate Rule Contentions are Resolved Copy Link Copied

All rules are resolved by the priority setting. The system goes through the rules from highest to lowest priority and picks the first one whose scope expression matches the object(s) being checked.

Rule Application Copy Link Copied

Batch DRC and during Signal Integrity analysis.