Working with the Undershoot - Rising Edge Design Rule on a PCB in Altium Designer

Created: марта 17, 2022 | Updated: марта 18, 2022 | Applies to version: 21

This document is no longer available beyond version 21. Information can now be found here: Undershoot - Rising Edge Rule for version 25

Примечание

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Rule category: Signal Integrity

Rule classification: Unary

Summary Copy Link Copied

This rule specifies the maximum allowable undershoot (ringing below the top value) on the rising edge of the signal.

All design rules are created and managed within the PCB Rules and Constraints Editor dialog. For a high-level view of working with the design rules system, see Defining, Scoping & Managing PCB Design Rules.

Constraints Copy Link Copied

Default constraints for the Undershoot - Rising Edge rule.

Maximum (Volts) - the value for the maximum permissible undershoot on the rising edge of the signal.

How Duplicate Rule Contentions are Resolved Copy Link Copied

All rules are resolved by the priority setting. The system goes through the rules from highest to lowest priority and picks the first one whose scope expression matches the object(s) being checked.

Rule Application Copy Link Copied

Batch DRC and during Signal Integrity analysis.

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