ワークスペースマネージャのコンパイルコマンド

Applied Parameters: Action=Compile|ObjectKind=Document

Summary

This command is used to compile (analyze) the active document.

Access

This command is accessed from the Schematic Editor by choosing the Project » Compile Document <DocumentName> command, from the main menus.

Use

After launching the command, the active document will be compiled. Any electrical and drafting violations that are detected by the Compiler will be listed as warnings and/or errors in the Messages panel.

Tips

1. The Compiler uses the options defined on the Error Reporting and Connection Matrix tabs of the Options for Project dialog, when checking the source document for violations.
2. Use the Navigator panel to peruse the compiled document.

Applied Parameters: Action=Compile|ObjectKind=Project

Summary

Before the design data is transferred to PCB layout, the design must first be verified. In Altium Designer, checking the design is done by compiling the project. This command is used to compile all source documents of the active project.

Access

This command is accessed from the Schematic Editor by choosing the Project » Compile Project command, from the main menus.

Use

After launching the command, the active project will be compiled. The compilation process performs four functions:

1. Instantiates the design hierarchy.
2. Establishes net connectivity between all the design sheets.
3. Builds an internal Unified Data Model (UDM) of the design.
4. Checks for logical, electrical and drafting errors between the UDM and compiler settings.

With respect to point 4, any violations that are detected by the Compiler will be listed as warnings and/or errors in the Messages panel.

Tips

1. A project is currently active when one of its associated design documents is active in the main design window.
2. The Compiler uses the options defined on the Error Reporting and Connection Matrix tabs of the Options for Project dialog, when checking the source documents for violations.
3. Use the Navigator panel to peruse the connectivity model for the compiled source documents.

Applied Parameters: Action=Compile|ObjectKind=All

Summary

Before the design data is transferred to PCB layout, the design must first be verified. In Altium Designer, checking the design is done by compiling the project. This command is used to compile all source documents of all open projects.

Access

This command can be accessed by:

• Choosing the Project » Design Workspace » Compile All Projects command, from the main menus.
• In the Projects panel, clicking the panel's Workspace button and choosing the Compile All Projects command from the context menu.

Use

After launching the command, all open projects will be compiled, in turn. In each case, the compilation process performs four functions:

1. Instantiates the design hierarchy.
2. Establishes net connectivity between all the design sheets.
3. Builds an internal Unified Data Model (UDM) of the design.
4. Checks for logical, electrical and drafting errors between the UDM and compiler settings.

With respect to point 4, any violations that are detected by the Compiler will be listed as warnings and/or errors in the Messages panel.

Tips

1. The Compiler uses the options defined on the Error Reporting and Connection Matrix tabs of the Options for Project dialog, when checking the source documents for violations.
2. Use the Navigator panel to peruse the connectivity model for the compiled source documents, with respect to the focused project. Note that when two or more projects are open in the active Design Workspace, use of this command passes focus to the last project listed in the Projects panel.
3. All currently open projects can also be compiled by clicking the left-hand side of the  button on the Projects panel.

Applied Parameters: Action=Compile|ObjectKind=FocusedDocument

Summary

This command is used to compile (analyze) the focused document.

Access

This command can be accessed by:

• Right-clicking over the entry for a schematic document in the Projects panel, and choosing the Compile Document <DocumentName> command from the context menu.
• Focusing the entry for a schematic document in the Projects panel, then clicking the panel's Project button and choosing the Compile Document <DocumentName> command from the context menu.

Use

First, ensure that the document you wish to compile is the focused document in the Projects panel.

After launching the command, the focused document will be compiled. Any electrical and drafting violations that are detected by the Compiler will be listed as warnings and/or errors in the Messages panel.

Tips

1. An entity in the Projects panel is focused either by clicking on it, or right-clicking on it. To distinguish it as being the focused entry, it appears with a dotted border.
2. The Compiler uses the options defined on the Error Reporting and Connection Matrix tabs of the Options for Project dialog, when checking the source document for violations.
3. Use the Navigator panel to peruse the compiled document.

Applied Parameters: Action=Compile|ObjectKind=FocusedProject

Summary

Before the design data is transferred to PCB layout, the design must first be verified. In Altium Designer, checking the design is done by compiling the project. This command is used to compile all source documents of the focused project.

Access

This command can be accessed by:

• Right-clicking over the entry for a project in the Projects panel, and choosing the Compile Project command from the context menu.
• Focusing the entry for a project in the Projects panel, then clicking the panel's Project button and choosing the Compile Project command from the context menu.

Use

First, ensure that the project you wish to compile is the focused project in the Projects panel.

After launching the command, the focused project will be compiled. The compilation process performs four functions:

1. Instantiates the design hierarchy.
2. Establishes net connectivity between all the design sheets.
3. Builds an internal Unified Data Model (UDM) of the design.
4. Checks for logical, electrical and drafting errors between the UDM and compiler settings.

With respect to point 4, any violations that are detected by the Compiler will be listed as warnings and/or errors in the Messages panel.

Tips

1. An entity in the Projects panel is focused either by clicking on it, or right-clicking on it. To distinguish it as being the focused entry, it appears with a dotted border.
2. The Compiler uses the options defined on the Error Reporting and Connection Matrix tabs of the Options for Project dialog, when checking the source documents for violations.
3. Use the Navigator panel to peruse the connectivity model for the compiled source documents.

Applied Parameters: Action=Recompile|ObjectKind=Project

Summary

This command is used to force a compile of all source documents of the active project, regardless of whether any documents have changed since the last compilation or not.

Access

This command is accessed from the Schematic Editor by choosing the Project » Recompile Project command, from the main menus.

Use

After launching the command, the active project will be recompiled. The compilation process performs four functions:

1. Instantiates the design hierarchy.
2. Establishes net connectivity between all the design sheets.
3. Builds an internal Unified Data Model (UDM) of the design.
4. Checks for logical, electrical and drafting errors between the UDM and compiler settings.

With respect to point 4, any violations that are detected by the Compiler will be listed as warnings and/or errors in the Messages panel.

Tips

1. A project is currently active when one of its associated design documents is active in the main design window.
2. The Compiler uses the options defined on the Error Reporting and Connection Matrix tabs of the Options for Project dialog, when checking the source documents for violations.
3. Use the Navigator panel to peruse the connectivity model for the compiled source documents.

Applied Parameters: Action=Recompile|ObjectKind=All

Summary

This command is used to force a compile of all source documents of all open projects, regardless of whether any documents have changed since the last compilation or not.

Access

This command can be accessed by:

• Choosing the Project » Design Workspace » Recompile All Projects command, from the main menus.
• In the Projects panel, clicking the panel's Workspace button and choosing the Recompile All Projects command from the context menu.

Use

After launching the command, all open projects will be recompiled, in turn. In each case, the compilation process performs four functions:

1. Instantiates the design hierarchy.
2. Establishes net connectivity between all the design sheets.
3. Builds an internal Unified Data Model (UDM) of the design.
4. Checks for logical, electrical and drafting errors between the UDM and compiler settings.

With respect to point 4, any violations that are detected by the Compiler will be listed as warnings and/or errors in the Messages panel.

Tips

1. The Compiler uses the options defined on the Error Reporting and Connection Matrix tabs of the Options for Project dialog, when checking the source documents for violations.
2. Use the Navigator panel to peruse the connectivity model for the compiled source documents, with respect to the focused project. Note that when two or more projects are open in the active Design Workspace, use of this command passes focus to the last project listed in the Projects panel.

Applied Parameters: Action=Recompile|ObjectKind=FocusedProject

Summary

This command is used to force a compile of all source documents of the focused project, regardless of whether any documents have changed since the last compilation or not.

Access

This command can be accessed by:

• Right-clicking over the entry for a project in the Projects panel, and choosing the Recompile Project command from the context menu.
• Focusing the entry for a project in the Projects panel, then clicking the panel's Project button and choosing the Recompile Project command from the context menu.

Use

First, ensure that the project you wish to recompile is the focused project in the Projects panel.

After launching the command, the focused project will be recompiled. The compilation process performs four functions:

1. Instantiates the design hierarchy.
2. Establishes net connectivity between all the design sheets.
3. Builds an internal Unified Data Model (UDM) of the design.
4. Checks for logical, electrical and drafting errors between the UDM and compiler settings.

With respect to point 4, any violations that are detected by the Compiler will be listed as warnings and/or errors in the Messages panel.

Tips

1. An entity in the Projects panel is focused either by clicking on it, or right-clicking on it. To distinguish it as being the focused entry, it appears with a dotted border.
2. The Compiler uses the options defined on the Error Reporting and Connection Matrix tabs of the Options for Project dialog, when checking the source documents for violations.
3. Use the Navigator panel to peruse the connectivity model for the compiled source documents.