Working with the Return Path Design Rule on a PCB in Altium Designer

Rule category: High Speed

Rule classification: Unary

Summary

This rule specifies a continuous signal return path along the designated reference layer above or below the signals targeted. The return path can be created from fills, regions, and polygon pours placed on a signal layer or plane layers. 

Constraints

Default constraints for the Return Path rule.

• Exclude Pad/Via Voids - when enabled, openings in the return path created by the clearance around pads and vias that belong to the targeted net(s), are not flagged as violations. 
• Minimum Gap to Return Path - indicates the minimum gap from the conductor edge to the outer edge of the return path. The check is applied along the entire length of the conductor. An error will be flagged if the gap is equal to or less than the Minimum Gap to Return Path value (default value is 0 mm).
• Impedance Profile - select the applicable impedance profile for the nets targeted by this rule. The profile specifies which layer(s) provide the return path for the targeted signals. Once the layer stack has been selected, the available signal layers and their respective reference layers, will be shown in the grid region of the dialog.

How Duplicate Rule Contentions are Resolved

All rules are resolved by the priority setting. The system goes through the rules from highest to lowest priority and picks the first one whose scope expression matches the object(s) being checked.

Rule Application

Batch DRC.