PCB_Dlg-ViaShieldingOptionsFormAdd Shielding to Net_AD

The Add Shielding to Net dialog

Summary

The Add Shielding to Net Dialog is used to add a shield to a net. A via shield is used to create a vertical copper barrier through the PCB to help reduce crosstalk and electro-magnetic interference in a route that is carrying an RF signal. A via shield, also known as a via fence or a picket fence, is created by placing one or more rows of vias alongside a signal route. 

Access

The dialog is accessed from the PCB Editor by clicking Tools » Via Stitching/Shielding » Add Shielding to Net from the main menus.

Options/Controls

Shielding Parameters

The shielding parameters control the shielding vias' placement pattern and their clearance from other-net and same-net objects.

• Net to shield - net to have shielding vias placed around.
• Selected Objects - place shielding vias around the selected objects rather than the entire net selected in the Net to shield field.
• Stagger alternate rows - alternate rows of shielding vias are offset by half of the Grid value.  
• Row Spacing - spacing between rows of shielding vias (edge to edge separation) when the Rows setting is greater than 1. 
• Distance - separation from the edge of the shielded net track segments, to the edge of the shielding vias.
• Grid - the distance between the edges of adjacent shielding vias. Shielding vias will not be placed in violation of applicable design rules; if a potential via site would result in a violation then that site is skipped.  
• Rows - number of rows of shielding vias.
• Add shielding copper - place a polygon over the area occupied by the shielding vias, connected to the net specified in the Via Net field. The polygon is defined in accordance with the applicable Clearance constraint and Polygon Connect Style design rules.
• Add clearance cutout - include a polygon cutout around the shielded net, set back from the net by the distance specified in the Distance field. Use this when you require a different clearance from the applicable Clearance constraint design rule. 

Via Style

The shielding Via Style can be configured manually by selecting the desired style or can be imported from the applicable Routing Via Style design rule by clicking the Load values from Routing Via Style Rule button. Clicking this button will load the Preferred rule settings. 

Diameters

• Simple - Via Style (Hole size and diameter) is the same through all layers.
  • Hole size - specify the hole size value for the Via.
  • Tolerance Min/Max - setting hole tolerance attributes can help determine the fits and limits of your board. Specify the Minimum (-) and Maximum (+) hole tolerance for the design.
  • Diameter - specify the diameter for the Via.
• Top-Middle-Bottom - different Hole Size and Diameters can be set at Top Layer, Middle Layer and Bottom Layer.
  • Hole size - specify the hole size value for the Via.
  • Tolerance Min/Max - setting hole tolerance attributes can help determine the fits and limits of your board. Specify the Minimum (-) and Maximum (+) hole tolerance for the design.
  • Top Layer - specify via size for top layer.
  • Middle Layer - specify via size for Middle layer.
  • Bottom Layer - specify via size for Bottom layer.
• Full Stack - different Hole Size and Diameters can be edited at each layer (including all signal layers and planes).
  • Hole size - specify the hole size value for the Via.
  • Tolerance Min/Max - setting hole tolerance attributes can help determine the fits and limits of your board. Specify the Minimum (-) and Maximum (+) hole tolerance for the design.
  • Edit Full Stack Via Sizes - click to open the Via Layer Editor dialog in which you can specify via settings for each layer stack.

Via Template

• Template - select a via template from the drop-down.
• Library - displays which library the via template is linked to and includes the option to Unlink the template from said library.

Properties

• Drill Pair - the layers on which this via starts and ends.
• Net - the net to which the via is currently assigned. Change the net assignment by clicking in the field and choosing a net from the drop down list. Select No Net to specify that the via is not connected to any net. The Net property of a primitive is used by the Design Rule Checker to determine if a PCB object is legally placed.
• Locked - enable this option to protect the via from being edited graphically. Lock a via whose position is critical. If you try to edit a primitive that is locked, you will be informed that the primitive is locked and asked if you wish to proceed with the action. If this option is unchecked, the primitive can be freely edited without confirmation.

Solder Mask Expansions

• Expansion value from rules - enable to allow the existing solder mask expansion rule to take effect on this pad object. Check the Mask design category from the PCB Rules and Constraints Editor dialog.
• Specify expansion value - enable to edit the expansion value and the solder mask expansion design rule is overridden for this pad.

• Force complete tenting on top - enable to override any solder mask settings in the solder mask expansion design rules and results in no opening in the solder mask on top layer of this pad. Disable this option and this pad is affected by a solder mask expansion rule or specific expansion value.

• Force complete tenting on bottom - enable to override any solder mask settings in the solder mask expansion design rules and results in no opening in the solder mask on the bottom layer of this pad. 
  Disable this option and this pad is affected by a solder mask expansion rule or specific expansion value. 

Additional Controls

• Via Types - click to open the Layer Stack Manager in which you can configure the via types for the active layer stack.

Tips

• Each set of shielding vias are added to a union. The set can be removed by running the Tools » Via Stitching/Shielding » Remove Via Shielding Group command, then clicking on any via in the group.