PCB_Dlg-LayerStacksWarningDialogWarning_AD
This document is no longer available beyond version 22.0. Information can now be found here: Verification of Layer Stack Compatibility for version 25
Summary
When building a panel, it is important that you ensure the layer stackup for each referenced child board is compatible with the stackup for the parent board onto which the panels are placed. This dialog helps you resolve layer stack compatibility. You have the choice to manually resolve the discrepancy at a later stage: a reminder will be generated if you attempt to generate fabrication output. Alternatively, you can get the software to automatically attempt to resolve layer stack compatibility issues.
Access
When placing an embedded board array, in the Embedded Board Array mode of the Properties panel, you will need to select a PCB document that will be used to populate the array. The Properties panel then displays whether the layer stacks are compatible. If the layer stacks are NOT compatible and you place the embedded board array anyway, this dialog opens.
Options/Controls
- Synchronize Manually Later - select to manually synchronize the layer stacks before the fabrication process. If the layer stacks have not yet been synchronized by fabrication, a reminder will be displayed when attempting to generate fabrication output.
- Synchronize Automatically Now - select to automatically synchronize the layer stacks. The automatic layer stack synchronization process will attempt to:
- Ensure that all required child board layer stack ordered layers exist in the parent board (the PCB file containing the embedded board array).
- Modify the parent board layer stack in an attempt to achieve synchronization - a child board is never modified.
- Make only additive or layer type modifications to the parent board - layers are never removed.