Tutorial - Setting Up the Design Rules in Altium NEXUS

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Parent page: Tutorial - A Complete Design Walkthrough with Altium NEXUS

Main pages: PCB Design Rules Reference, Defining, Scoping & Managing PCB Design Rules

The PCB Editor is a rules-driven environment, meaning that as you perform actions that change the design, such as placing tracks, moving components, or autorouting the board, the software monitors each action and checks to see if the design still complies with the design rules. If it does not, then the error is immediately highlighted as a violation. Setting up the design rules before you start working on the board allows you to remain focused on the task of designing, confident in the knowledge that any design errors will immediately be flagged for your attention.

Design rules are configured in the PCB Rules and Constraints Editor dialog, as shown below (Design » Rules). The rules are divided into ten categories, which can then be further divided into design rule types.

All PCB design requirements are configured as rules/constraints, in the PCB Rules and Constraints Editor.
All PCB design requirements are configured as rules/constraints, in the PCB Rules and Constraints Editor.

Routing Width Design Rules

Design rule reference: Width

The width of the routing is controlled by the applicable routing width design rule, which the software automatically selects when you run the Interactive Routing command and click on a net.

When you are configuring the rules, the basic approach is to set the lowest priority rule to target the largest number of nets, and then add higher-priority rules to target nets with special width requirements, such as power nets. There is no issue if a net is targeted by multiple rules; the software always looks for and only applies the highest priority rule.

For example, the tutorial design includes a number of signal nets and two power nets. The default routing width rule can be configured at 0.25mm for the signal nets. This rule will target all nets in the design by setting the rule scope to All. Even though a scope of All also targets the Power nets, these can be specifically targeted by adding a second, higher-priority rule, with a scope of InNet('12V') or InNet('GND'). The image below shows the summary of these two rules, the detail is shown in the images in the following two collapsible sections.

Two Routing Width design rules have been defined, the lowest priority rule targets All nets, the higher priority rule targets objects in the 12V net or the GND net.
Two Routing Width design rules have been defined, the lowest priority rule targets All nets, the higher priority rule targets objects in the 12V net or the GND net.

  • Routing Width and Routing Via Style design rules include Min, Max, and Preferred settings. Use these if you prefer to have some flexibility during routing, for example, when you need to neck a route down or use a smaller via in a tight area of the board. This can be done on the fly as you route by pressing 3 to cycle through the routing widths, or 4 to cycle through the via sizes. There are also other techniques for editing the routing width and via size as you route; these are discussed more in the routing section.
  • Avoid using the Min and Max settings to define a single rule to suit all sizes required in the entire design. Doing this means you forgo the ability to get the software to monitor that each design object is appropriately sized for its task.

When there are multiple rules of the same type, the PCB editor uses the rule Priority to ensure the highest priority applicable rule is applied.

If you are adding rules:

  • When a new rule is added it is given the highest priority, and
  • When a rule is duplicated the copy is given priority below the source rule.

Click the Priorities button at the bottom of the dialog to change the priorities.

Defining the Electrical Clearance Constraint

Design rule reference: Clearance Constraint

The next step is to define how close electrical objects that belong to different nets can be to each other.

This requirement is handled by the Electrical Clearance Constraint. For the tutorial, a clearance of 0.25mm between all objects is suitable.

Note that entering a value into the Minimum Clearance field will automatically apply that value to all of the fields in the grid region at the bottom of the dialog. You only need to edit in the grid region when you need to define a clearance based on the object-type.

The electrical clearance constraint is defined between objects. Switch the Constraints to Advanced to display all object kinds.
The electrical clearance constraint is defined between objects. Switch the Constraints to Advanced to display all object kinds.

Note that the Electrical Clearance Constraint has two object selection fields: Where The First Object Matches and Where The Second Object Matches. That is because this is a binary rule; it is a rule that applies between two objects.

Defining the Routing Via Style

Design rule reference: Routing Via Style

As you route and change layers, a via is automatically added. In this situation, the via properties are defined by the applicable Routing Via Style design rule. If you place a via from the Place menu, its values are defined by the in-built default primitive settings. For the tutorial, you will configure the Routing Via Style design rule.

A single routing via is suitable for all nets in this design.
A single routing via is suitable for all nets in this design.

Existing Design Rule Violations

You might have noticed that the transistor pads are showing that there is a violation. Right-click over a violation and select the Violations in the right-click menu, as shown below. The details show that there is a:

  • Clearance Constraint violation
  • Between a Pad on the MultiLayer, and a Pad on the MultiLayer
  • Where the clearance is 0.22mm, which is less than the specified 0.25mm

Right-click on a violation to examine what rule is being violated and the violation conditions. In this image, the display is in single layer mode, with the Top Layer as the active layer.
Right-click on a violation to examine what rule is being violated and the violation conditions. In this image, the display is in single layer mode, with the Top Layer as the active layer.

This violation will be discussed and resolved shortly. If you find the violation markers distracting, you can clear them by running the Tools » Reset Error Markers command. This command only clears the marker; it does not hide or remove the actual error. The error will be flagged again the next time you perform an edit action that runs the online DRC (such as moving the component), or when you run the batch DRC.

Review the Design Rules

The default new board created by the software will include rules that are not needed in every design, and many other design rules will need to be adjusted to suit the requirements of your design. For this reason, it is very important to review the design rules. This can be done in the PCB Rules and Constraints Editor. Select Design Rules at the top of the tree on the left, then scan down the Attributes column for all of the rules and quickly locate any that need their values adjusted.

The default board also uses imperial units. If your board uses metric, there will be many rule values, such as the Soldermask expansion, that will change from rounded values like 4mil, to 0.102mm, or the Minimum Solder Mask Sliver default will change from 10mil to 0.254mm. While that least significant digit, for example, 0.002mm, is insignificant when it comes to output generation, you can edit these settings in the design rules if it bothers you.

Reviewing the design rules, note the column order can be changed if required.
Reviewing the design rules, note the column order can be changed if required.

Design rules can also be exported and stored in a .RUL file, then imported into future PCB designs. To do this, right-click in the tree on the left of the PCB Rules and Constraint Editor to open the Choose Design Rules dialog. Select the rules you want to export using the standard Windows selection techniques then click OK to export the selected rules.
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