PCB_Dlg-FormWizardViewxSignals Multi-Chip Wizard_AD

In this mode, the Wizard can be used to define multiple xSignals between a chosen source component and multiple target components. The Wizard is configured over a number of pages. The number of pages depends on the circuit configuration. For example, if there are series terminators, there will be additional pages. The configuration of each page is described below.

Select the Source Component

Use this page to select a single source component. Use the Filter and the Min Pin Count fields at the top of the grid to help locate the component of interest. The * and ? wildcards are supported.

Select the Source Nets

Select the nets of interest connected to the chosen source component. Use the Filter and Label fields at the top of the grid to help locate the nets of interest. Only pins with the listed nets will become the sources of the signal routes.

Select Destination Components

Select the desired destination component(s). Use the component Filter and the Min Pin Count fields at the top of the grid to help locate the component of interest.

xSignal Routes

After analyzing the net paths to identify potential xSignals, the Wizard will then attempt to reduce the set to only list combinations that you are interested in. These are the end-to-end xSignals; the above image shows them between the source and destination components selected in the previous pages of the Wizard. The image also shows that the Wizard has detected series termination component RA1 in each route. RA1 is actually a four resistor pack – in this situation, the Wizard will automatically create logical associations, assuming that each resistor runs across the pack, it will pair the nets that connect to pins that are opposite each other on the component.

Because this assumption that the pins of each resistor are opposite each other might not always be correct, you can select any of the other available outgoing nets using the dropdown in the Dest Pin column. Alternatively, enable the Show all alternative paths option at the top of the grid to display all of the potential combinations of nets that could be used to generate xSignals. Enable the checkbox for each line for which you want to create an xSignal. The enabled xSignals will be added to the class displayed in the Include created xSignals into class field at the bottom of this page. Enter a new name or select one from the drop-down.

xSignals Length Tuning

This page is used to automatically create a Matched Length design rule for the enabled xSignals. Enable only those xSignals you want to be targeted by this new design rule. If your design requires multiple rules with different requirements, you will be given the opportunity to define additional rules for those xSignals that have not yet had a rule defined later in the process. This first stage will also present the overall end-to-end xSignals. In later Wizard pages, you will have the opportunity to define design rules for the sections within the xSignals – for example, for the output pin to series termination resistor sections.

If you do not want to tune the length of your xSignals, enable No, I don't want to tune the length of my xSignals. No other options on this page will be available if this option is enabled. To be able to edit and access the other options, enable Yes, I want checked xSignals to have the same routed length.

The xSignals Class Base Name field is used to define a name for the currently selected xSignals. Enter a meaningful name, keeping in mind that you may be repeating this process for other xSignals. This set of xSignals will then be targeted by a design rule of the name you enter into the Matched Lengths Rule Base Name field, with the specified Length Tolerance.

Source-to-Passives Length Tuning

If the set of nets selected include series termination components, additional Wizard pages will appear that give you the opportunity to create additional xSignals and design rules for these sections of the nets. In the above image, you see that this page of the Wizard is being used to create a Matched Length design rule for the chosen xSignals that run from the Source pins to the termination components. If you require xSignals / an xSignal class / a design rule for these, enable the Yes, I want these segments to have the same length for next xSignals option, enable the required xSignals, and define the xSignals Class Base Name, Matched Lengths Rule Base Name and Length Tolerance. Additional xSignals will be created to use with this Matched Length rule.

Passives-to-Destinations Length Tuning

This page is used to create a Matched Length design rule for the chosen xSignals that run from the termination components to the Destination pins. If this is required enable the Yes, I want these segments to have the same length for next xSignals option, enable the required xSignals, and define the xSignals Class Base Name, Matched Lengths Rule Base Name and Length Tolerance. Additional xSignals will be created to use with this Matched Length rule.

Report and Continue

This page of the Wizard will detail the number of xSignals about to be created and the number of design rules about to be created.

At the bottom of the page you can choose to:

• Continue length tuning for created signals – select if you disabled specific xSignals on previous pages and now need to go through the process of defining additional rules for those xSignals.
• Restart wizard for the same source component – select if you want to discard these settings and restart the Wizard with the same components/nets selected.
• Finish wizard – select if you are finished with this source component's xSignal and design rule creation.

These xSignals are ready for length tuning. To get started, select the Interactive Length Tuning option () from the main Route menu or the Active Bar.

In this mode, the wizard will automatically create the xSignals, xSignal Classes, Matched Length Groups, Diff Pair Matched Lengths rules and Fly-By topology for on-board DDR3/DDR4. The Wizard assumes that a fly-by routing topology will be used.

Select The Source Components

On this page, the Wizard identifies all potential source components and target components based on the designator prefix and the number of pins. Use the Controller/Memory Devices fields to filter components/memory devices and use the up/down arrows to set the Min Pin Count as required for both the Source Component and Target Components Then select a single source component and select the target component(s).

Address Group

The functionality of this page is as follows:

• Fly-By Topology and T-Branch Topology options are supported. Select the required topology from the drop-down list.
  • If Fly-By Topology is chosen, the target devices are listed in the Point-to-Point order of the fly-by routing. The software will attempt to determine the order automatically. If the Wizard is run before component placement, then the point-to-point order will need to be set manually using the drop-down controls.
  • If T-Branch Topology is chosen (as shown above), half of the target devices will be shown before the source, and half after. Use the drop-down controls to order the target components as required.
• Define xSignal Class Name Syntax:
  • The starting default is ADDR_PP[#]
  • The [#] represents the number of memory devices.
  • The PP suffix can be changed if required.
• The Wizard analyzes the components and looks for these suffixes in the design and displays the full name syntax, using the approach detailed below. Update these if they are not correct.
  • The objective here is to automatically find the nets that correspond to these functions Once the nets are found, the naming syntax is entered into the fields.
  • The nets between the components are then reviewed once the suffix is found the prefix is identified For example, the Wizard looks for _A[#] to locate the Address lines.
  • If no nets are found with a suffix that begins with “_”, it then looks only for the text after the “_” Alternative separators, such as “-” or “.” are also checked for.
  • If the syntax cannot be automatically determined, you must define these fields. Use the drop-downs to select from the existing nets on the board.
• Once the order and the naming syntax has been defined, click the Analyze Syntax & Create xSignal Classes button to build the list of xSignals. The Wizard will look at the syntax and how the components are connected and form the xSignal Classes that are displayed in the grid on the right side of the dialog. The number of Classes Created will match the number of memory devices.
• The number of classes created (e.g., 4) and the number of xSignal nets in each class (e.g., 26).
• The xSignals are grouped in a column for each xSignal class. A Matched Lengths design rule will be created for each class. The sub-headings in the table represent the source and target components for these xSignals.
• If the automatically generated list is incomplete or incorrect, click the Modify Nets in xSignal Classes button to open and Edit xSignal Class dialog and manually add or delete nets to/from a class. Note that manual changes will be lost if the Analyze Syntax & Create xSignal Classes button is then clicked again.

Identifying the Data Group Nets

The final stage is to identify all of the nets that belong to the Data Group.

The functionality of this page is as follows:

• User-defined xSignal Class name syntax:
  • The starting default is DATA_BL[#]
  • The [#] represents the number of Byte-Lanes, which is determined by the total number of Data lines divided by the Data Bus Width defined earlier.
  • The BL suffix can be changed if required.
• The Wizard analyzes the components and looks for these suffixes in the design then displays the full name syntax Use the drop-downs to update if these are not correct.
• Once the naming syntax has been defined, click the Analyze Syntax & Create xSignal Classes button to build the list of xSignals. The Wizard will look at the syntax and how the components are connected and form the xSignal Classes that are displayed in the table on the right side of the dialog. The number of Classes created will match the number of Byte-Lanes connected to the memory devices. Above the table area, the number of classes created (e.g., 8) and the number of xSignal nets in each class (e.g., 11) are displayed.
• Matched Lengths design rules are created for these xSignal Classes. The sub-headings in the table represent the source and target components for the Byte-Lane xSignals.
• If the automatically generated list is incomplete or incorrect, click the Modify Nets in xSignal Classes button to open and Edit xSignal Class dialog and manually add or delete nets to/from a class. Note that manual changes will be lost if the Analyze Syntax & Create xSignal Classes button is then clicked again.
• Click the Create Spreadsheet button to generate an XLS-format spreadsheet of the xSignals created by the Wizard.

xSignals and xSignal Classes Created

The Wizard automatically creates xSignals and xSignal Classes for the:

• Address xSignals detailed on the Address Group page.
• Data xSignals detailed on the Data Group page.

The Wizard can process all USB 3.0 channels between each controller–to-connector-pair specified by the user. The Wizard automatically evaluates Differential Pair nets connected to the controller, detecting those that span through to the connector. The span can include passive components and multiple nets. The Wizard identifies each of these pairs by an xSignal class, with each leg of the pair identified by a controller-to-connector xSignal.

Once you have selected USB 3.0, the page will include a setting for the Matched Length Tolerance Within Diff Pair. Enter a suitable value. This value is used for the design rule created by the Wizard and can be changed at any time in the PCB Rules and Constraints Editor. User-defined settings such as this are saved for future use.

For USB 3.0, each USB user port is referred to as a channel. As seen in the image, each channel includes three differential pairs: Transmit, Receive and Data.

Select the Source and Target Components

On this page, the Wizard identifies all potential source components and target connectors based on the designator prefix and the number of pins.

1. Set the filter prefix for the Controller designator, the Connector designator, and the Min Pin Count values as required.
2. Select a single source component.
3. Select the target component(s).

Channels Define Differential Pair Groups

On this page, define a naming syntax that the Wizard can use to identify the relevant Transmitter, Receiver and Data pair nets, which are then included in xSignals. Each pair of xSignals is then clustered into an xSignal class and these classes are used to scope the Matched Length design rule.

The functionality of this page is as follows:

• The designator of the Controller is displayed next to the Components label. Next to this, the drop-down includes all of the Connectors selected on the previous page of the Wizard.
  • The naming syntax options shown apply to each of the connectors listed in the drop-down. Select each in turn and check that the chosen naming syntax is complete and suitable.
  • As mentioned, for USB 3.0, each USB user-port is referred to as a channel. You can set the number of channels (Channels Total) from 1 to 32. Typically, each connector has a single channel.
• Within each USB 3.0 channel there are three differential pair paths: Transmit, Receive and Data, which run from the Controller to the Connector. The Wizard will create an xSignal, spanning series components as required, for each positive net, and another xSignal for each negative net, and then an xSignal class to represent that Controller-to-Connector pair. The Define xSignal Class Name Syntax group is used to specify the names of these xSignal classes. The Wizard also creates suitable Differential Pairs, if there are none already defined.
  • Define xSignal Class Name Syntax – the xSignal classes that are created will be named as specified, with each channel assigned a numeric value in place of the [#]. Enter your preferred string as required.
• Channel <N> – these fields define the masks that are used to identify the relevant Transmitter / Receiver / Data net names.
  • The Wizard has a large template of predefined naming schemes that it checks and usually will populate these fields automatically. If it does not, select the correct name from the drop-down or type in a suitable net name syntax.
• Once the naming fields are configured, click the Analyze Nets & Create xSignal Classes button.
  • The Wizard will create the xSignals, xSignal Classes, and Matched Length rules for all of the channels. Note that these are created each time you re-run the Wizard. Delete them if you plan to run the Wizard again.
• The resulting xSignal Class names and their member xSignals are detailed in the grid.
• Click the Create Spreadsheet button to generate an XLS-format spreadsheet of the xSignals created by the Wizard.
• Click Finish to complete the Wizard.