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Working with the Signal Top Value Design Rule on a PCB in Altium NEXUS

Created: 3月 23, 2017 | Updated: 9月 26, 2019 | Applies to versions: 1.0, 1.1, 2.0, 2.1, 3.0, 3.1 and 3.2
現在、バージョン 3.0. をご覧頂いています。最新情報については、バージョン Working with the Signal Top Value Design Rule on a PCB in Altium NEXUS の 4 をご覧ください。

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Rule category: Signal Integrity

Rule classification: Unary

Summary

This rule specifies the minimum voltage level that a signal can settle to in the high state (the top value).

All design rules are created and managed within the PCB Rules and Constraints Editor dialog. For a high-level view of working with the design rules system, see Defining, Scoping & Managing PCB Design Rules.

Constraints

Default constraints for the Signal Top Value rule.Default constraints for the Signal Top Value rule.

  • Minimum (Volts) - the value for the minimum permissible top value voltage.

How Duplicate Rule Contentions are Resolved

All rules are resolved by the priority setting. The system goes through the rules from highest to lowest priority and picks the first one whose scope expression matches the object(s) being checked.

Rule Application

Batch DRC and during Signal Integrity analysis.

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