Mixed Generic and Numeric Bus Labeling

Parent category: Violations Associated with Buses

Default report mode:

Summary

This violation occurs when two net identifiers (port, net label, sheet entry, etc.,) connected to the same bus slice differ in their bus syntax; one defines a bus range in numeric format (e.g., A[0..2]), while the other defines the range in a generic format (e.g., A[0..b]).

Notification

If compiler errors and warnings are enabled for display on the schematic (enabled on the Schematic - Compiler page of the Preferences dialog), an offending object will display a colored squiggle beneath it. A notification is also displayed in the Messages panel in the following format:

Mismatched generic and numeric bus labeling on <NetName> <Level> value first and Generic ,

where:

NetName is the name of the parent net to which the mismatched bus labeling is associated.

Level depends on the numeric ordering for the net. If ascending (e.g., [0..2]) Level will appear as Low. If descending (e.g., [2..0]) Level will appear as High.

Recommendation for Resolution

With the violation selected in the Messages panel, use the Details region of the panel to cross probe to the offending objects. Determine which of the objects is erroneous in its bus label specification and change it accordingly.