Validating the Logical Design

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Parent page: Capturing the Logical System Design

To validate your Multi-board design, choose the Run ERC command from the main Design menu.

Validate your Multi-board design using the Run ERC command.
Validate your Multi-board design using the Run ERC command.

The software checks for logical, electrical, and drafting errors between the design content and project checking settings. There are a number of checks that can be performed on the validated Multi-board design. These are configured as part of the project options. Select the Project » Project Options command from the main menus to open the Project Options dialog and select its Error Reporting tab. The Report Mode of each violation can be changed to one of four values by clicking on it and selecting the desired value in the drop-down.

Configure the required violation checks on the Error Reporting tab of the Project Options dialog.
Configure the required violation checks on the Error Reporting tab of the Project Options dialog.

If validation errors and warnings are detected in the design, a notification is displayed in the Messages panel. Note that the Messages panel will only open automatically if there is at least one Error or Fatal Error condition. To check for a Warning, you will need to open the panel manually by clicking the Panels button on the bottom-right of the design space and choosing Messages. Once the project has been validated, the panel will list any warnings and errors that have been detected.

The Messages panel displays the warnings and errors detected in the Muli-board design project.
The Messages panel displays the warnings and errors detected in the Muli-board design project.

See the sections below for detailed information about each error check.

Violations Associated with Connections

Violations Associated with Mated Parts

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