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Signal Integrity - Undershoot - Rising Edge

Created: March 23, 2017 | Updated: September 26, 2019 | Applies to versions: 1.0, 1.1, 2.0, 2.1, 3.0, 3.1 and 3.2
Now reading version 1.1. For the latest, read: Signal Integrity - Undershoot - Rising Edge for version 4

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Rule category: Signal Integrity

Rule classification: Unary

Summary

This rule specifies the maximum allowable undershoot (ringing below the top value) on the rising edge of the signal.

All design rules are created and managed within the PCB Rules and Constraints Editor dialog. For a high-level view of working with the design rules system, see Defining, Scoping & Managing PCB Design Rules.

Constraints

Default constraints for the Undershoot - Rising Edge rule.Default constraints for the Undershoot - Rising Edge rule.

  • Maximum (Volts) - the value for the maximum permissible undershoot on the rising edge of the signal.

How Duplicate Rule Contentions are Resolved

All rules are resolved by the priority setting. The system goes through the rules from highest to lowest priority and picks the first one whose scope expression matches the object(s) being checked.

Rule Application

Batch DRC and during Signal Integrity analysis.

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