Mismatched Hidden Pin Connections

Parent category: Violations Associated with Components

Default report mode:

Summary

This violation occurs in multi-part components when a hidden pin common to more than one sub-part is connected to different nets.

Notification

If compiler errors and warnings are enabled for display on the schematic (enabled on the Schematic - Compiler page of the Preferences dialog), an offending object will display a colored squiggle beneath it. Hovering over the object will display a pop-up hint that summarizes the violation. A notification is also displayed in the Messages panel in the following format:

Mismatched hidden pin connections in Pin <Identifier> and Pin <Identifier>

where:

• Identifier is used to identify the pin in question. The identifier appears in the format PhysicalComponentName-PinDesignator (e.g., U2-7).

Recommendation for Resolution

Reassign the offending pin(s) to the correct nets. A hidden pin is assigned to a net by entering the net name into the Hidden Net Name field in the SCHLIB List panel or the SCH List panel, when the panel is displaying pin properties. If this is being done in the SCH List panel, right-click in the panel and enable the Show Children option to list the pins in the panel. 

Tip

• Object hints will only appear provided the Enable Connectivity Insight option is enabled on the System - Design Insight page of the Preferences dialog. Use the controls associated with the Object Hints entry in the Connectivity Insight Options region of the page to determine the launch style for such hints (Mouse Hover and/or Alt+Double Click).