保持原理图和PCB同步

Parent page: Working Between the Schematic and the Board

Whether you're transferring a captured design to a new PCB for the first time, or making changes to an existing design on either the schematic or PCB side, some way of keeping the two sides in-sync is required. Altium Designer provides a powerful desi gn synchronization feature that delivers an effective solution to the problem of keeping the design synchronized, allowing the designer to keep their focus on the creative aspects of the design process.

The synchronization process detects and resolves the schematic and PCB differences.

Design synchronization is performed directly between the schematic and PCB editors, there is no intermediate, netlist-like document used. The software uses a comparator engine to compare all aspects of the design, detailing the output as a list of differences. The designer decides which side should change to resolve the differences, and a set of Engineering Change Orders (ECOs) is created. These are then applied, bringing the two sides of the design back in to sync.

What Can be Synchronized?

The synchronization process ensures that the component and connective data on the schematic, matches the component and connective data on the PCB. As well as the component and connective data, the synchronization process also ensures that other design constraints; such as net classes, component classes and design rules, are also in sync.

Configuring the Comparator Options

Dialog page: Options for PCB Project, Comparator tab

Exactly what schematic and PCB data gets compared, is configured in the Comparator tab of the Options for PCB Project dialog. Select Project » Project Options to open the dialog.

The comparator engine obeys the settings defined in the Comparator tab of the Options for Project dialog.

The main region of the dialog includes a large list of Comparison Types, such as Different Designators and Changed Net Name, which are grouped in 5 categories. The Mode column on the right includes a dropdown for each, where you select the mode of comparison, such as Find Differences or Ignore Differences. Text-type comparisons have a third option, to allow the comparison to be case-insensitive.

The default for a new project is to Find Differences for every comparison type, set the options as required for your project.

Across the bottom of the dialog there are options for setting the Object Matching Criteria. Matching is a sophisticated, multi-pass process that does not rely on simple exact string matching. To learn more refer to the Matching the Nets and Classes topic later in the article.

Note the Ignore Rules Defined in the PCB Only option down the bottom of the dialog, enable this to exclude the rules you have defined in the PCB, from the comparison process.

Synchronizing Net and Component Classes

Dialog page: Options for PCB Project,  Class Generation tab

As well as component and connective data, you can also generate and synchronize classes and design rules when you perform a Design » Update PCB. There are two types of classes that can be generated from the schematic and synchronized to the PCB:

• automatic classes - derived from the buses/harness, components or sheet contents; and
• user-defined classes - derived from design directives placed by the designer.

The generation of these are configured in the Class Generation tab of the Options for Project dialog (the synchronization is controlled by options in the Comparator tab).

Use the options in the Class Generation tab to configure the automatically generated classes you require, and if you want to create user-defined classes during design synchronization.

Automatically Generated Classes

Net Classes

Net classes can be automatically generated for the following groups of nets:

Named Signal Harnesses	Signal harnesses are used to bundle and transport multiple nets across a schematic project. The harness is not used to name the nets carried within that harness, except when the harness has a net label placed on it. Note that placing a net label on a signal harness changes the net naming syntax, from being the individual net labels placed on the wires, to being <HarnessNetLabel>.<HarnessEntryName>. If you do not want to rename the nets in a harness, you can create a user-defined net class instead, as described below. Refer to the Working with Signal Harnesses topic for more information about Signal Harnesses. Enable the Generate Net Classes for Named Signal Harness option to create a PCB net class for each named signal harness, during design synchronization. This is a global option that is applied to the entire project.
Buses / Bus Sections	Enable the Generate Net Classes for Buses option to create a PCB net class for each bus (and each bus slice if the sub-option is enabled), during design synchronization. This is a global option that is applied to the entire project.
Components	This option creates a net class for each component in the design, containing all of the nets connected to that component. This is a global option that is applied to the entire project.
Sheets	Generate a net class for the nets within each sheet, as per the chosen scope. Note that Local Nets Only scope option will not include nets that enter or exit the sheet. Note also that a net can belong to more than one PCB net class, so the All Nets option will result in all of the sheet-spanning nets appearing in multiple classes. This option is configured for each schematic sheet.

Component Classes

It is common for the schematic project to be structured over multiple sheets, with each sheet representing a logical block of the overall design. Supporting this, you can automatically generate a component class that contains all of the components on that sheet, for each of the schematic sheets in the project, by enabling the appropriate Component Class checkbox. The PCB component class will have the same name as the Designator of the sheet symbol that references that schematic sheet. A component class will not be created if the sheet does not contain any components.

Generate Rooms

A room is a polygonal-shaped object that is an aid to component placement, these are created automatically for each schematic sheet that has the Generate Rooms checkbox enabled. In the PCB, each room is defined as a design rule, which will be created with the scope of InComponentClass('<SheetSymbolDesignator>'). A room will not be created if the sheet does not contain any components. When the schematic is initially transferred to the PCB, the components in each component class are arranged in a row, and then a room is created around that component class, as shown below.

The PCB after initial design synchronization - a room has been created for each sheet, and that room has that sheet's component class assigned to it.

Structure Classes

A structure class can include net classes, component classes, and lower-hierarchical-level structure classes, as its members. A structure class is created for each sheet that the option is enabled for, and will include the sheet-level component and net classes, if those options are enabled for that sheet. Edit the Structure Class in the PCB editor to add other net / component / structure classes. Use the Structure mode of the PCB panel to locate the components and nets in that structure class.

Creating User-Defined Classes

You can also create user-defined component classes and net classes, by attaching a parameter to the relevant component or net. PCB component and net classes will then be created if the appropriate User-Defined Classes checkboxes are enabled in the Class Generation tab of the Options for Project dialog.

User-Defined Component Class

In the schematic, you can specify that a component be added to a PCB component class when the schematic is synchronized with the PCB.

To do that, you add a parameter to the component, with the parameter Name string set to ClassName, and the parameter Value string set to the required <PCB_ComponentClassName>, as shown in the example image below.

By adding a parameter to the component, this component will be added to the PCB component class called Power.

User-Defined Net Class

Object page: Parameter Set

To add a net (or the nets in a bus or signal harness) to a PCB net class, you need to attach a parameter to that net / bus / harness. You do that by placing a Parameter Set object with its end touching the net / bus / harness, as shown in the image below. You can either place the Parameter Set object ( Place » Directives » Parameter Set) and then manually add a parameter to it, or you can place a pre-configured Parameter Set object using the Place » Directives » Net Class command.

The parameter must have the Name set to ClassName, and the parameter Value set to the required <PCB_NetClassName>.

To add a net to a PCB net class, attach a Parameter Set object to the schematic net, then add a parameter to the Parameter Set object.

Using a Blanket to Apply a Directive to Multiple Nets

Object page: Blanket

You can also add multiple nets to a PCB net class by placing a Blanket directive that covers all of those nets. The function of a Blanket is to allow you to apply a directive to all of the nets under the blanket (either identified by a net identifier, such as a Net Label or Power Port that is under the blanket, or a net that has an end vertex contained within the Blanket). Instead of placing the Parameter Set directive so that it touches a wire, you place it so that it touches the edge of the blanket, as shown in the image below. Note that it is the value of the Parameter within the Parameter Set object that defines the PCB net class name, not the display name of the Parameter Set object.

Using a Blanket directive to bundle all the nets under it, into a PCB net class called Power. Note that the Parameter Set object name is not used for naming, it is a visual reference only.

Synchronizing Design Rules

As with classes, design rules are also applied in the schematic as a parameter. In each object that you can add parameter, for example a component or a Parameter Set object, there is an Add as Rule button.

Clicking the Add as Rule button adds a parameter with the Name set to Rule. When this parameter name is used, the Parameter Properties dialog will include an Edit Rule Values button. Click this button to open the Choose the Design Rule Type dialog. After selecting the required design rule, the last stage is to define the rule constraints in the Edit PCB Rule dialog.

By clicking the Add as Rule button, the parameter becomes a container for holding the definition of a PCB design rule.

In both the image above and the image below, the design rule is defined in a Parameter Set object that is attached to a blanket. By including a ClassName parameter in that Parameter Set object a PCB net class will also be created, and because the class definition is present, the PCB rule will be scoped InNetClass('<PCB_NetClassName >'). 

In the image below you will notice that the Parameter Set object is displayed as a Differential Pair directive. This is also a Parameter Set object, in this case it has a Parameter with the Name DifferentialPair and a Value of True. When the software sees a Parameter Set object with this parameter, it recognizes it as a differential pair directive and displays it as a Differential Pair symbol, instead of the default Parameter Set object. You can place a pre-configured Differential Pair directive via the Place » Directives » Differential Pair command, which places with this parameter already defined.

The Parameter Set object can display in different ways, depending on the parameters that it holds.

In the example shown above, there are three parameters in the Parameter Set object, which apply to all of the nets under the blanket in the following way:

Parameter Name	Parameter Value	Parameter Function
ClassName	ROCKET_IO_LINES	Create a PCB Net Class called ROCKET_IO_LINES , with the net class members being all of the nets detected under the blanket.
DifferentialPair	True	Create a PCB differential pair for each pair of suitably named nets (matching net names, ending in _P and _N). For the nets in the image, 8 PCB differential pairs will be created. If the Blanket had not been used, you would need to place a Differential Pair directive on each net you wanted included in a pair.
Rule	Differential Pair Routing [rule details]	Create a PCB Differential Pair Routing Rule, scoped to PCB Net Class created by the Class Name parameter present in this Parameter Set object.

Configuring the ECO Generation Options

The Options for Project dialog also includes an ECO Generation tab. This tab defines which design modifications can have ECOs created. Typically these are all enabled, with the options in the Comparator tab being used to configure which design changes are to be synchronized between the schematic and the PCB.

The ECO Generation tab defines which types of modifications can have ECOs created.

Finding Differences

The design synchronization feature is able to detect and resolve differences in both directions; that is, from the schematic to the PCB, or from the PCB back to the schematic.

The software is actually capable of resolving these differences by applying changes to both sides, at the same time. For example, imagine the scenario where the electronics designer has changed the value of a capacitor, while the PCB designer has changed the footprint of that same capacitor. These two differences can be resolved in a single update process, by applying the comment change as a schematic-to-PCB update, and the footprint change as a PCB-to-schematic update.

When the comparator engine compares the schematic project to the PCB a complete list of differences is created, at this stage there is no assumption on which side must be changed to bring them back into sync.

The list of differences can be seen in the Differences between dialog. To open the Difference between dialog and see a list of differences:

• Run the Project » Show Differences command to open the Choose Documents to Compare dialog, as shown in the image below. The Choose Documents to Compare dialog is used to select what two documents/document-sets you will be comparing, typically it is the schematic project against the PCB. You can also use this dialog to compare any document to any document by ticking the Advanced Mode option. For example, you might be comparing a netlist to a PCB, or a PCB to a PCB.

Select the PCB to compare against.

• Select the PCB in the main part of the dialog, and click OK to open the Difference between dialog, as shown below.

The Differences between dialog will open. The next step is to assign an update direction to each difference:

• For an individual difference, click in the Update column to display a direction selector, as shown in the image below.
• For multiple differences of the same kind, right-click on a heading, such as Different Footprints, and select the required Update Same Kind command.
• For all differences, right-click anywhere in the dialog and select the required Update All command.

For each difference, the Update direction must be set for an ECO to be created to resolve that difference.

Once the Update direction has been assigned, click the Create Engineering Change Order button to open the Engineering Change Order dialog, which is described below.

Performing a Direct Update

Since the designer normally knows which way they want to apply the updates, and those updates are all in the same direction, you can choose to skip the difference detection and direction assignment process that has just been described.

Rather than selecting the Show Differences command from the Project menu, you choose the Update command from the Design menu, from either the schematic editor or the PCB editor. Your choice of editor from which you run the command, indicates the direction you want the changes to be made - from this editor, to that editor. For example, you would choose Design » Update in the schematic editor to push all changes from the schematic, to the PCB.

The Differences between dialog will now be skipped, instead you will jump straight to the Engineering Change Order dialog.

If all of the updates are going to be applied in the same direction, use the Design » Update command.

Resolving Differences - Applying the ECOs

Dialog page: Engineering Change Order

Each difference is resolved by applying an Engineering Change Order (or ECO for short). The ECOs are listed in the Engineering Change Order dialog with one ECO per line, each with its own Enable checkbox.

When using the Engineering Change Order dialog:

• The dialog opens with all changed enabled, disable any changes you wish to hold off for now. The dialog supports multi-select, use the right-click context menu to toggle the enable state of selected ECOs.
• Use the right-click Cross Probe command to examine the objects affected by that ECO.
• Use the Validate Changes button to check that the changes can be performed. ECOs typically fail because an object is not available, for example the specified PCB footprint does not exist in the Available Libraries, or the specified pad does not exist on the footprint.
• An ECO can also fail because an object that is needed by a certain ECO was not present, but was just added during the processing of the current ECOs. In this situation, run the Update command again to complete that ECO.

Each design change presents as an ECO, enable those that are required. Once all ECOs have been applied the schematic and PCB will be back in sync.

Understanding the Linking Between the Schematic and the PCB

Linking the Components

Each schematic component is linked to its PCB component through a Unique Identifier (UID). In the Schematic editor the UID is assigned when the component is placed on the sheet, and that value is transferred to the PCB component when the design is transferred to the PCB editor. While this scheme would be adequate for a simple design, it is not capable of supporting a multi-channel design, where the same schematic component is repeated in each physical channel (which would mean the repeated PCB components would end up with the same UID).

To cater for this, the UID for the PCB component is created by combining the UID of the parent Sheet Symbol with the UID of the schematic component, with the following syntax (shown in the image below):

PcbUID = \SheetSymbolUID\ComponentUID

The UID connects each schematic component to its PCB equivalent.

When the Component Link is Broken

Each schematic component links to its PCB component via a Unique IDentifier (UID). By using a unique identifier, it means that the designators can become unsynchronized (perhaps by performing a PCB re-annotate a number of times), without any risk of the schematic and PCB becoming un-synchronizable.

The UID is assigned to the schematic component when the part is placed on the sheet, then transferred to the PCB component when the design is first transferred from the schematic editor to the PCB editor. So far so good, there is no component linkage management that needs to be performed.

But if additional components are added to the schematic and an Update PCB performed, there is no longer a match between the set of schematic components and the set of PCB components, so the software will halt and warn that not all of the components are linked, and offer to match by designator instead. In earlier versions of Altium Designer, the only way to recover from this situation was to switch to the PCB editor and run the Project » Component Links command. This command opens the Edit Component Links dialog, which is the interface for managing UIDs. The designer would then match the UIDs and click Perform Update, the outcome being that the PCB UIDs would be updated if needed, so each matches the UID of their schematic part.

To simplify how the designer deals with this situation, Altium Designer 16.1 introduced an automatic link resolution feature. Now when you perform an Update PCB and there are component UID mismatches, the following dialog appears:

If there are UIDs present on either side without a matching UID on the other side, this dialog appears.

Regardless of which button you click, the sequence of steps is the same. These steps include:

1. Update the component links - if the Automatic button is clicked, this step is not displayed on screen. If the Manual button is clicked, the Edit Component Links dialog opens, where you must match any unmatched components and transfer them to the Matched Components side. Don't worry about new schematic components, they remain on the left side of the dialog and are added to the PCB as part of the ECO step. Once all possible matching has been done, the Perform Update button is clicked to assign matching UIDs to those newly matched components. If UIDs are changed, an Information dialog will report the details.
2. Match any unmatched nets - If there are nets whose names do not match on both sides, the Match Manually dialog will appear next, reporting that some nets are not able to be matched (this dialog does not appear if all nets are matched). If you click Yes in the Match Manually dialog the Match Nets dialog will open, where you can manually match any unmatched schematic nets to unmatched PCB nets. If you choose to click No, then instead of you matching the differently named nets, the existing unmatched nets are removed from the PCB, and the new nets that do not currently exist on the PCB, are added.
3. The Engineering Change Order dialog then opens, detailing all of the changes that must be made to synchronize the schematic and the PCB. Once these are executed, the schematic and PCB should be back in sync.

Manually Matching the Component UIDs

1. Click Cancel in the Failed to Match dialog mentioned in the previous section to terminate the Update process, then make the PCB the active document. 
2. Select the Project » Component Links command to open the Edit Component Links dialog, as shown below. This dialog is where UID synchronization is managed. It displays the un-matched schematic and PCB components in the two narrower columns to the left, with the matched components shown on the right.
3. Selected components can be individually matched using the controls in the middle of the dialog, or all unmatched components can be automatically matched using the Add Pairs Matched By button (and associated checkboxes) down the bottom of the dialog. If you know the components already have matching designators, use this button. The outcome is that, for all components that were not matched, the PCB UID is updated to match the schematic UID.
4. Once the UIDs are matched again, return to the schematic and run the Design » Update command again.

The Edit Component Links dialog is used to detect and resolve UID mismatches, it is run from the PCB editor.

Matching the Nets and Classes

Both nets and classes have a parent (the net or class), and children (the members of that net or class). Matching these requires a different approach than the UID mechanism used for component linking, to support changes to: the parent; the children; or both the parent and its children. For example, something as simple as changing the name of a net on the schematic should not require that net and all its children be removed from the PCB, then the newly named net be added, and finally all the children be added to that new net.  

To support this, the software includes separate matching algorithms to match nets and classes by their members, and also by their name. The matching process is configured in the Object Matching Criteria section of the Comparator tab of the Options for Project dialog.

The default settings is to match members first, then by Object Type name.

Matching for these types of objects is handling in the following way:

• During design synchronization, the default behavior is to first attempt to match by members, in accordance with the Min Match % and Min Match Member settings.
• If member matching fails, the software will then attempt to match by name (if the Use Name Matching option is enabled).
• If either of these matching processes succeeds, you will proceed to the Engineering Change Order dialog.
• If both matching techniques fail (or the Use Name Matching option is set to Never), the Match Manually dialog will open.

Click Yes to match the net or class manually.

• Clicking No in the Match Manually dialog will skip the user-matching process and jump straight to the Engineering Change Order dialog. Since you have not attempted to match any unmatched objects, the software assumes that the reference and target objects are un-related, so will generate ECOs that remove the Unmatched Reference Objects from the board, and add the Unmatached Target Objects as new objects.
• If you click Yes in the dialog to match manually, the Match <ObjectType> dialog will open, as shown below (the dialog caption will change to suit the unmatched object type).

The Match <ObjectType> dialog is used to manually match objects that you know to be matched. Leave the right side empty and click Continue if you are unsure.

• In this dialog, you select the objects that you want matched in the Unmatched Reference Objects and Unmatched Target Objects, and then transfer them to the Matched Pairs section of the dialog. For these objects, the software will generate an ECO to update the names so they now match, and ECOs to remove/add members, so they also match.
• You do not have to manually match objects, for example if you are unsure. For any unmatched objects, the software assumes that the reference and target objects are un-related, so will generate ECOs that remove the Unmatched Reference Objects from the board, and add the Unmatched Target Objects as new objects.
• Once you have matched those objects that you know do match, click Continue to open the Engineering Change Order dialog.
• If you click Cancel, the update process terminates.

Matching the Design Rules

Design rules that are defined on the schematic must also be linked to the matching rule on the PCB. If there was no linking mechanism, you would not be able to update the rule on the schematic and flow those changes to the PCB. Schematic-to-PCB rule matching is like component matching, it is one-to-one. Because of this, UIDs can also be used to link the schematic design rule to the PCB design rule.

The UID is assigned to the parameter that holds the rule definition on the schematic, and transferred to the PCB during design design synchronization.

Design rules also use a UID to match the schematic design rule definition to the PCB design rule.

Typically you will not need to manually manage the matching of rules, unless you have edited the UID in either the schematic or the PCB. If the UIDs do not match, the software will add a new rule to the PCB for any schematic rule that does not have a matching PCB rule, and remove any PCB design rule that does not have a matching schematic design rule.