Working with Signal Integrity Analysis Results in Altium Designer
The SDF document generated for the configured and run signal integrity analysis comprises one or more tabs that correspond to the nets you have selected for analysis. Each tab contains a chart that can contain multiple wave plots. A wave plot can have multiple waveforms and a waveform represents the simulation data.
Accessing signal integrity analysis results. Click the tab at the bottom to access the results for each analysis type.
Reflection Analysis Data
For each net that has been selected, a chart is generated as the result of the simulation with its tab in the SDF document marked by the name of the net. The chart will contain waveforms for all termination options.
For a reflection analysis chart, the data displayed depends on:
- the number of pins in the net under test
- the specific termination types enabled (on the Signal Integrity panel)
- whether a sweep of the (virtual) termination component values is included as part of the analysis (again, enabled and defined on the Signal Integrity panel).
If you ran a reflection analysis with no termination components, a chart would contain one plot for each pin in the net under test. Each plot would contain one waveform – relating to the analysis of that pin with no termination used. For example, consider a reflection analysis for the net RTSB, which includes the following pins:
- U1 pin 12
- U3 pin 4
- U3 pin 5
With no terminations enabled, the following chart (plots and waveforms) would be created and displayed for this net. The waveform names are created based on the net name, the specific pin and the type of termination (in this case, no termination).
Reflection results – no terminations
If you were to enable specific termination types without enabling a sweep of the values, additional waveforms would be added to each plot representing the results obtained by using each of those terminations. The image below shows, for emphasis, the case when all termination types are enabled.
Reflection results – terminations enabled (no sweep)
If you enable terminations AND a sweep of the termination values (with two or more sweep steps), you will get a plot for each pin in the net under test, and for each enabled termination. The waveforms that are displayed within each plot will be those for each sweep step for that particular termination, as well as the no termination waveform (for comparison). The image below illustrates this display for our example RTSB net – with two termination types enabled (Serial Res and Parallel Res to VCC), and the sweep feature enabled with Sweep Steps set to 2.
Reflection results – terminations enabled, with sweep.
Crosstalk Analysis Data
In a crosstalk analysis, all nets will be displayed in a chart named Crosstalk Analysis. The display of data for the crosstalk analysis chart is essentially the same as that for a reflection analysis chart. The only difference is that as there is only a single chart for this analysis type, it will contain a plot for each pin in each net considered in the analysis. The image below shows an example where two nets are considered in a crosstalk analysis – DTRA (set to be the Aggressor net) and RTSA (which defaults to being the Victim net). No specific termination types have been enabled.
Crosstalk results – no terminations
Cross Probing to the PCB
If you have performed a post-layout signal integrity analysis of your design, the ability to cross-probe from a selected waveform to a PCB is available.
To cross probe, right-click on the required waveform name and choose the Cross Probe to <DocumentName>.PcbDoc command. The PCB document will be made active and the corresponding pin for the analyzed net will be highlighted, again in accordance with the Highlight Methods defined on the System – Navigation page of the Preferences dialog.
An example of cross-probing to a PCB, where pad 19 of component HDR3 – associated with net HB19 – is highlighted.
After Analyzing Your Results
Once you have analyzed your results, you can experiment, for example, with various terminations to bring down any ringing on the selected nets. You may also need to make changes to your circuit or PCB and rerun your Signal Integrity analyses until the desired results are reached.
Note that as you run subsequent reflection and crosstalk analyses on different nets, the results will be added to the same simulation data file, appearing as new charts (tabs at the bottom of the SDF document).