デザインルールチェッカ

The Design Rule Checker dialog

Summary

This dialog allows the designer to configure design rule checking for the board. Design Rule Checking (DRC) is a powerful automated feature that checks both the logical and physical integrity of a design. Checks are made against any or all enabled design rules and can be made online, during design, or as a batch process (with an optional report). This feature should be used on every routed board to confirm that minimum clearance rules have been maintained and that there are no other design violations. It is particularly recommended that a batch mode design rule check always be performed prior to generating final artwork.

Access

The dialog is accessed from the PCB Editor by choosing the Tools » Design Rule Check command from the main menus.

Options/Controls

The dialog's functionality is essentially divided into two areas:

• Configuration of options relating to a Batch DRC.
• Configuration of which rules to check, and whether those rules should be checked as part of the Online and/or Batch DRC.

These areas are reflected by, and accessed through, the folder-like entries in the left-hand pane.

• Run Design Rule Check - click this button to perform a Batch DRC, in accordance with rules enabled for Batch checking, and additional options defined for this type of checking.

Report Options

Clicking on the Report Options folder loads the right-hand side of the dialog with additional options that are available when running a Batch DRC.

DRC Report Options

• Create Report File - enable this option to have a report generated after running a Batch DRC for the board.

• Create Violations - enable this option to have violations highlighted in the workspace, in accordance with defined violation disaplay settings. This option is also required to have violations appear listed in the Violations region of the PCB Rules And Violations panel.

• Sub-Net Details - if an Un-Routed Net rule has been defined, enable this option to include sub-net details in the DRC report.

• Verify Shorting Copper - enable this option to verify the integrity of the shorting copper in any Net Tie components used in the design. This check looks for any unconnected copper in a component (indicative of a pad not shorting the other pad(s) correctly).
• Report Drilled SMT Pads - enable this option to include any SMT (Surface Mount Technology) pads that have been erroneously drilled, in the DRC Report.

• Report Multilayer Pads with 0 size Hole - enable this option to include any invalid multi-layer pads found in the design. An invalid multi-layer pad is one whose hole size is zero, which would otherwise make it an SMT pad.
• Stop when n violations found - use this field to determine the maximum number of violations that can be detected before the batch DRC process is stopped (default = 500). Limiting the number of violations that are reported is a key strategy in keeping the checking process manageable.

Split Plane DRC Report Options

• Report Broken Planes - enable this option to have the batch rule checking process look for, and report, broken planes. Broken planes occur when an area of a plane that has connectivity to a net becomes electrically disconnected from the rest of the plane. An example of where this may occur is a connector placed across a split plane, but not connected to it. The voids around the pins join to completely cut through the plane copper, effectively breaking it into two parts.

• Report Dead Copper larger than - enable this option to have the batch rule checking process look for, and report, dead copper regions larger than the specified area. Dead copper refers to sections of copper that have no connectivity to a net, and which also become electrically disconnected from the original parent plane. An example of where this may occur is a connector (not connected to the plane) with closely spaced pins, in which the voids around the pins join to isolate areas of plane copper from the rest of the plane. Use the associated field to specify a value for the minimum permissible area of dead copper, beyond which is considered a rule breach (default = 100 sq. mils).

• Report Starved Thermals with less than n% available copper - enable this option to have the batch rule checking process look for, and report, starved thermal connections larger than the specified percentage. Thermals are connections to a plane with thermal relief 'cutouts' around them to reduce heat conductivity to the plane copper. A thermal can become 'starved' when the surface area of the copper spokes connecting it to the plane is reduced by void areas. This option also checks the surface area for the thermal (not just the spokes) against any void areas that encroach into the thermal. Use the associated field to specify a value for the minimum permissible percentage of connecting copper that must remain, below which is considered a rule breach (default = 50%).

Rules To Check

The Design Rule Checker dialog, listing all rules that can be checked.

Clicking on the Rules To Check folder loads the right-hand side of the dialog with a list of all checkable rule types. Alternatively, click on a specific category (below the folder) to list only those design rule types associated to that category.

For each rule type, the following information is presented;

• Rule - the type of rule.
• Category - the parent category to which the rule type is associated.
• Online - the current state of this rule type with respect to Online DRC (where available). Click to toggle.
• Batch - the current state of this rule type with respect to Batch DRC. Click to toggle.

Enable each rule type for Online and/or Batch checking as required.

Tips

1. A generated Design Rule Verification Report lists each rule that was tested during the batch checking process, as specified in the Design Rule Checker dialog. Each violation that was located is listed with full details of any reference information, such as the layer, net name, component designator and pad number, as well as the location of the object. Click on the entry for an offending object to cross probe directly to that object in the workspace.
2. To give further flexibility when displaying rule violations in the workspace, the two violation display types – violation details (custom violation graphics) and violation overlay – have separate associated system colors. This allows the designer to differentiate between the two using different, distinct colors. Color assignment is performed on the Board Layers And Colors tab of the View Configurations dialog:
   1. Violation Details – uses the color assigned to the DRC Detail Markers system color.
   2. Violation Overlay – uses the color assigned to the DRC Error Markers system color.
3. After running a Batch DRC, double-clicking on a violation message in the Messages panel will cross-probe to the object(s) causing that violation in the workspace.
4. When running an Online or Batch DRC, any rule violations will be listed in the Violations region of the PCB Rules and Violations panel.
5. Violations associated with a particular design object can be interrogated directly within the PCB workspace. Position the cursor over an offending object, right-click and choose a command from the Violations sub-menu. Either choose to investigate an individual violation that the object is involved in, or choose to view all violations in which it is involved, using the Show All Violations command. In each case, the Violation Details dialog will appear, providing detailed violation information and controls for highlighting and jumping to the offending object(s).