Power Analyzer by Keysight

The practical performance of a PCB design layout depends on a multitude of factors, many of which can be predicted, to a reasonable degree, through a range of PCB design analysis tools such as post-layout Signal Integrity analysis. What's often neglected, however, or simply relegated to a 'rule of thumb' methodology, is developing the most effective layout design for board's DC Power Delivery systems. This is the judgment applied to the design of a board's copper areas that provide both the DC supply rails to the circuitry and their ground or common return path to the DC supply source. The desired outcome is an efficient design that maintains the integrity of the design's DC power layout.

With modern digital designs featuring high-speed circuitry, multiple devices, densely populated boards, and multiple supply rails, the demands placed on a design's DC power distribution network warrant a more analytical approach to its design. The DC analysis of a Power Delivery Network (PDN), or the results of its DC Power Integrity (PI-DC), is basically aimed at ensuring that adequate copper has been provided in the path from the voltage sources to the loads – in other words, that the planes, traces, and vias on the board are of sufficient size (and characteristics) to meet the power consumption requirements of the devices on the board.

Fortunately, the guesswork can be removed from the assessment of a PCB's power delivery network through the use of a DC Power Integrity (PI-DC) simulation tool, which analyzes a board design's DC performance based on its electrical and physical properties and helps the engineer answer critical design questions, including:

  • Identify and resolve DC voltage and current density issues.

  • Calculate multi-network and return path interactions.

  • Visualize the voltage and current density distribution and identify hotspots in the PCB editor.

  • Examine the voltage, current density, and via current at any location on the board.

  • Generate a report of the analysis simulation results.

To perform a DC Power Integrity analysis right in the Altium Designer PCB design environment, the go-to solution is the Power Analyzer by Keysight.

Provided as a downloadable Altium Extension application, the Power Analyzer by Keysight, enabled by Keysight Technologies, integrates directly with Altium Designer to allow PI-DC simulation and analysis of the current PCB project. Rather than relying on simple cross-sectional area calculations to determine the current carrying capacity of the power network, the Power Analyzer first accurately models the copper structures, and then calculates the power delivery voltages and currents across the PCB. With results presented in both visual and tabular form, the engineer can use this feedback and quickly adjust the track widths, copper thicknesses, and via properties to ensure they achieve the integrity of DC power delivery required for their design.

To perform a Power Integrity analysis in Altium, the engineer first creates a hierarchical network of the entire power delivery system, identifying each power and return net, the sources and loads, as well as any series elements present in each section of the power network. Once the network and configuration settings have been defined, the Power Analyzer can examine the entire network.

  • Power net configuration, as well as the review of existing power analysis results and generation of a power analysis report, can all be performed by anyone with a valid Altium Designer license. Performing a new Power Analysis requires a valid Power Analyzer by Keysight license.

  • The Power Analyzer by Keysight extension is supported for use in Altium Designer 22.10 and later.

If you'd like to learn by watching, check out the How To Work with Power Analyzer by Keysight video playlist in the Altium Academy.


Configuring the Power Network

The Power Analyzer examines the flow of energy through the copper pathways in the power network. The power network is defined by identifying and configuring the various network elements, including the net, the source, any series components, and the loads. To configure the power network:

Add an Analysis document to the Project

Analysis is configured and run from a Power Analyzer by Keysight document (<ProjectName>.pdnaK).

Configure the Board Properties

The Power Analyzer needs to know the physical properties of the board, such as the allowable current density, the type of copper, the working temperature, and so on. Confirm that the default values defined in the Configuration section of the analyzer document are suitable for your design.

Automatic Power Net Identification

The Power Analyzer can attempt to identify the power nets automatically. To do this, it needs to know how to identify circuit elements such as voltage regulators, connectors, and series components. As well as using clues such as component designator prefixes, you can also add parameters to certain components to enhance the automatic detection process. Learn more about Configuring the Auto-Define Settings.

Choose the Power Net(s)

Click Button - Define Automatically for automatic power net identification, or click Button - Manage Nets to manually select the power net(s). Learn more about defining the Power Nets.

Extend the Net(s)

If the power net passes through a series component such as a fuse, extend the net and identify the series components and chained nets. Learn more about extending a net.

Identify and Configure the Source

Each power net starts from a Source, such as a connector. Enable the source in the Add Source dialog, then click the Gear icon to configure that source. Learn more about identifying and configuring the Source.

Identify the Loads

Start with the major current consumers, including the Voltage Regulator Modules (VRMs). Learn more about identifying the Loads.

Configure the Loads and VRMs

Click the gear icon to open the Load Properties dialog, and configure each load. When a device is configured as a Voltage Regulator Module (VRM), a child power network is automatically created in the hierarchy with that VRM as the source.

Identify the Loads in the Child Power Nets

Ensure that the major load components are included in each power net.

Confirm the Power Network

Click the Button - Show in Tree button to confirm that the power network is ready to test.

Ready for Analysis

Check the Tree to visually confirm that each power network is complete. To move from one power net to another, click on the Power Analyzer by Keysight link to return to the power net document, and select the Tree for each power net. When this is complete, you're ready to analyze the power network.


Analyzing the Power Network

Once the Power Networks have been defined, you're ready to analyze the DC power distribution across and through the board.

Analyze the Copper Structures

Based on the Configuration settings, when you click the Button - Analyze All Nets button, the copper structures present in the board are analyzed and simulated to determine the current flows and voltage drops.

Show on PCB

A Summary of the Voltage Drop, Current Density and Max Via Current analysis results are shown as part of the Power Net Definition in the *.pdnaK document (highlighted above in light blue). Click Button - Show on PCB to explore the current density and voltage drop heatmaps. The colored heatmap view will open in the PCB editor and the Power Analyzer by Keysight panel will also open, where you can configure the Heatmap, explore any Violations, and place measurement Probes. Learn more about Running an Analysis.

Examine the Heatmaps

The calculated current flow and voltage drops are displayed as Heatmaps, directly in the PCB editor. Use the PCB editor Layer tabs to examine the heatmap on each layer, switch between 2D and 3D PCB view modes with the standard 2 and 3 shortcuts, and click the Show Heatmap button in the Power Analyzer by Keysight panel to switch between the power analysis Heatmaps, and the standard PCB display modes.

Explore the Analysis Results

In the PCB editor, the power network analysis result you are examining is controlled via the Power Analyzer by Keysight panel. At the top of the panel, select the power network/net whose Heatmap you want to display. Note that if there are violations present in the design, the default is to include Only nets with violations in the dropdown, clear that option to include all power nets in the list. Learn more about the Power Analyzer by Keysight Panel.

Switch between Current Density and Voltage Drop

The Heatmap displays either the Current Density through the copper or the Voltage Drop across the copper, use the buttons at the top of the Heatmap tab of the panel to select the required mode. A scale for the Heatmap is displayed below the board, automatically scaled for current from Zero to Max Current Density, or for voltage drop from (Voltage - VDrop) to Voltage. Directional arrows indicating current flow can be displayed on the Heatmap, and the Current Density or Voltage Drop scale can be adjusted. Learn more about configuring and controlling the display of the Heatmap.

Exploring the Voltage Drop

The location of current density hotspots can be directly identified by their color on the heatmap. Because it is calculated as a difference between locations, understanding the voltage drops requires deeper interpretation. To assist in identifying critical locations, use the Enable Visual Slider for Voltage Contour option to display pre-defined contour lines, either as a voltage or as a percentage. Learn more about the Heatmap for Voltage Drop.

Probing the Results

To take a measurement directly from the Heatmap, place a Probe. Place a single Probe to display the absolute Current or Voltage at that location, or click at a second location to measure the difference between the two Probe points. The type of measurement (V or I) is determined by the current Heatmap mode (Current Density or Voltage Drop). Note that probing the center-point of a thru-hole will always display the Current Density. Learn more about Probes.

Examine the Ground Net Results

By default, the Ground net is excluded from the Heatmap results. Disable the Skip Ground checkbox in the Configuration section of the *.pdnaK document to include it, then select the GND net in the Network / Net dropdown at the top of the Power Analysis by Keysight panel. Note that the Heatmap supports polygon structures on signal layers, but the behavior of a power plane layer cannot be simulated. Learn more about the Configuration options.


Interpreting and Reporting the Results

The Power Analyzer provides detailed feedback, directly in the PCB editor. From the Power Analyzer by Keysight panel, violations can quickly be investigated, measurement probes placed, and heatmaps captured as images. To access detailed information about the DC power analysis of your board, a report can be generated. The detailed report opens inside the pdnaK document, and from there, you can save preferred sections into an HTML report file. The report can either be for an individual power net, or the entire power network.

Javascript
Working with the Interactive Graphical Results

Working from the interactive Power Analyzer by Keysight panel, you can quickly identify and examine violations.

Generating the Report

To generate a detailed report, click the Button - Analyze All Nets button in the Power Analyzer by Keysight document (<ProjectName>.pdnaK). Alternatively, a report for any individual net can be generated by clicking the appropriate  button.

Detailed Net Report - Parameters

The Full Report lists all the power nets that have been analyzed; click a Net Name to open the detailed report for that net. The left side of the Net report lists:

  • The name of the power net (and all sub-nets if it has been Extended), along with an overall Pass / Fail status. 
  • Calculated Parameters: Vdrop, Idensity and Ivia_max.
  • If any of the calculated Parameters show a Warning (orange line) or Error (red line), suggestions on resolving these warnings/errors will be displayed below the Parameters.
Detailed Net Report - Results

The right side of the report includes collapsible sections for:

  • Global Settings - physical properties of the board, such as the allowable current density, the type of copper, the working temperature, and so on. These are configured in the pdnaK document.
  • Design Stackup - arrangement of the physical layers that make up the board, defined in the PCB Layer Stack Manager.
  • Heatmap for Current Density - displays the distribution of current in that net throughout the copper for each layer in the board. The density of current is represented by color; the greater the current density, the hotter the color. 
  • Heatmap for Voltage Drop - displays the range of voltages present on that net for each copper layer in the board. The higher the voltage, the hotter the color (or, the greater the voltage drop, the colder the color).
  • System-Level Power Network Results - Tree of all devices configured in all of the power nets, highlighting the devices in the chosen power net.
  • Network Details - Detailed report of the results of the analysis of that net, more about this in the next slide.
Detailed Net Report - Network Details

Use the Network Details section to quickly identify potential issues in the design. This section lists:

  • Power Net Members - graphical representation of the Sources and Loads in the chosen power net, as defined in the pdnaK document. 
  • Power Consumption - power consumed by the chosen power network.
  • Least Margins - the margin is the difference between the allowed current and the calculated current, giving an indication of how much more current carrying capacity is available (the margin). The Least Margin identifies the location of the smallest margin (or greatest failure for a negative result). Use the Least Margin result to quickly identify the worst-case results for the Non-Via Current Density and the Via Current, expressed as an Absolute value (Allowed Current - Calculated Current), and also as a Percentage ((Allowed - Calculated) / Allowed * 100).  A zero or negative value indicates a Fail.
  • List of Violations - the number of violations of each type that are present on the board.
  • Failed Via Summary - a list of the via and thru-hole component pads whose Current or Current Density results return a Margin of zero or less. Results can be sorted by clicking a column heading; click a second time to sort in the other direction, hold Shift as you click to sub-sort additional columns.
Save the Report

To create an HTML report of the analyses, click the button. In the Save Report Settings dialog, configure the required power Networks and Data that you would like to include, then click button to save the report as a set of HTML files. The report is created in a date & time-stamped folder within the project folder, \PowerAnalyzerByKeysight_Output\HTMLReport\<ProjectName> [PDNA]_<Date>_<Time>. Locate and open the file Report.html to examine the report in your default browser.

 

Include Probe Results and Image Captures

Images captured via the button in the Power Analyzer by Keysight panel are automatically included at the end of the Network Details section of the HTML report, along with any images of Probe results saved using the the button.


Playlist - How to Work with Power Analyzer by Keysight

It takes time to learn how to work with new design software. If you learn best by watching, then why not check out this video playlist that demonstrates some of the key features of  How to Work with Power Analyzer by Keysight.

Power Analyzer playlist

 

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