Finalizing Your Captured Design

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Once the schematic capture process has been completed, the next step is to push the design into the PCB domain ready for layout. At this point, it is important to briefly take stock of where things are at and to check over the design to make sure that things will proceed smoothly in the PCB space.

This page provides a listing of some of the key checks that should ideally be performed prior to moving onto PCB layout.

Annotation

Ensure that the design has been fully Annotated and that the designator settings correctly reflect the design approach that has been used.

Class Generation

Net and Component Classes can be created automatically during design compilation, but they can also be manually specified at the schematic level where the design topology can be easily recognized. Taking the time to do this upfront before migrating to the PCB domain will save a lot of time in the PCB space, and will also ensure that the schematic is the true reference of design information.

Electrical Rules Check

The Design Compiler will perform an Electrical Rules Check each time the design is compiled, however, it is reliant on you setting the appropriate warning/error levels within the Project Options dialog.  Review these settings on the Error Reporting tab and Connection Matrix tab of the dialog to ensure that they make sense. Consider also enabling the Report Suppressed Violations in Messages Panel option to make sure that any NoERC directives that have been placed on the design are still valid.

Checking the Error Reporting settings in the Project Options dialog.
Checking the Error Reporting settings in the Project Options dialog.

Pin Swapping Information

Being able to pin swap components in a design can make a huge difference to the complexity of the layout challenge and can help lower the layer count (and therefore cost) of the PCB. Unfortunately, the Layout Engineer may not have all the information necessary to intelligently set up the pin swapping settings since they cannot always assume to know the designer's full intent. Ideally, the person who captured a design should also have a hand in setting up Pin Swapping data to ensure the design intent and constraints are accurately captured.

When Pin Swapping information has been loaded, ensure the relevant components are enabled for Pin Swapping and that the appropriate Pin Swapping options have been enabled on the Options tab of the Project Options dialog.

Correct Footprints

If the design has been captured using a range of libraries and the footprints have been manually attached or edited, it is imperative that a careful review of all footprint data is undertaken. The Footprint Manager dialog can be used to help rationalize footprints across the design, but some level of sanity checking will also be required. There is no way for the system to catch design errors such as specifying a 20W resistor onto a 0603 footprint. These all need to be reviewed carefully, and recognize that footprint names can vary across component suppliers. Do not assume anything!

Additional Project Options

Settings covering Electrical Rules Checking have already been mentioned, however, there are additional project options that should be reviewed prior to sending the design onto PCB layout.

Additional project options that should be checked prior to sending the design to layout.
Additional project options that should be checked prior to sending the design to layout.

Class Generation Tab

Letting Altium Designer automatically create Net Classes, Component Classes, and Rooms based on the design's topology can be a great way to bring order to the design data, but it can also add to the noise presented to the Layout Engineer. Review the settings on the Class Generation tab of the Project Options dialog to ensure they are consistent with the Layout Engineer's expectations (and expertise).

Comparator Tab

There are a number of changes that can be made in the schematic that will not be synchronized to the PCB unless their associated options are enabled on the Comparator tab of the Project Options dialog. For example, extra Net Classes that have been added during Schematic Capture will only be propagated into the PCB domain if the Extra Net Classes option is set to Find Differences.

ECO Generation Tab

If the creation and tracking of Engineering Change Orders (ECOs) is considered an important part of design management, it will be important to ensure the settings are correct on the ECO Generation tab of the Project Options Dialog.

Options Tab

On the Options tab of the Project Options dialog, review the Netlist Options and Net Identifier Scope to ensure Nets will be labeled correctly once the design is transferred to the PCB. From the Layout Engineer's perspective, it is much easier to work with Nets labeled USBData rather than NetU2_37.

Supporting Documentation

Design Projects are not limited to only containing files that have been created by Altium Designer - just about any document can be included in a project. When the document is accessed from within Altium Designer, the system will attempt to determine the corresponding authoring/viewing tool based on the file's extension and settings in the Windows registry. Assuming a match can be found, Altium Designer will then launch the associated editor, either within its own editing environment or as a separate application. This means that you can include all manner of test, documentation, background, and specification documents with your design projects, and have the confidence that wherever the design project goes, all the supporting documentation will travel with it.

Proceeding with the Update

Once all the final checks have been completed, the design is then ready for pushing into the PCB. If a PCB document does not already exist in the project, it will be necessary to create it and set up the layer stack and board outline. But once a PCB document has been attached to the project, it can be readily updated as necessary using the Design » Update PCB Document menu command.

Additional Topics

Use the following links to access additional high-level documentation associated with finalizing the schematic and preparing your design for transfer to the PCB domain:

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Note

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