Violations Associated with Mated Parts when Validating a Design in Altium Designer

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The Violations Associated with Mated Parts region on the Error Reporting tab of the Project Options dialog
The Violations Associated with Mated Parts region on the Error Reporting tab of the Project Options dialog

Logical, electrical, and drafting awareness in the schematic diagram of your Multi-board Design project can be verified during design project verification according to rules defined as part of the options for the design project – on the Error Reporting tab of the Project Options dialog.

Violations associated with Multi-board Design projects are only presented after running an Electrical Rules Check (ERC) from the project's Multi-board Schematic document (*.MbsDoc). Do this by choosing the Design » Run ERC command from the main menu.

For more information about creating Multi-board schematics, see the Capturing the Logical System Design page.

The Violations Associated with Mated Parts region on the Error Reporting tab of the Project Options dialog allows specifying the severity level associated with check of violations related to mated parts that can exist in source documents when validating a Multi-board project. Use the following collapsible sections to access information on each violation available in this region.

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