Working with the Board Outline Clearance Design Rule on a PCB in Altium Designer

Rule Category: Manufacturing

Rule classification: Unary

Summary

This rule defines the minimum clearance allowed from design objects that are fabricated, to edges of the board. Either a single clearance value can be specified for all object-to-edge possibilities, or different clearances for different pairings can be defined, through use of a dedicated Minimum Clearance Matrix. The terms Board Outline and Board Edge are general names used interchangeably to describe the outer edge of the board. The term edge is defined in the table below the image. The Board Outline Clearance design rule checks object-to-edge clearances on the electrical and overlay (silkscreen) layers.

Constraints

Default constraints for the Board Outline Clearance rule.

Working with the Clearance Matrix

Definition of clearance values in the matrix can be performed in the following ways:

• Single cell editing - to change the minimum clearance for a specific object pairing.
• Multi-cell editing - to change the minimum clearance for multiple object pairings:
  • Use Ctrl+click, Shift+click, and click&drag to select multiple cells in a column.
  • Use Shift+click, and click&drag to select multiple contiguous cells in a row.
  • Use click&drag to select multiple contiguous cells across multiple rows and columns
  • Click on a row header to quickly select all cells in that row.
  • Click on a column header to quickly select all cells in that column.

Once the required cells have been selected, type in the new value and press Enter on the keyboard.

How Duplicate Rule Contentions are Resolved

All rules are resolved by the priority setting. The system goes through the rules from highest to lowest priority and picks the first one whose scope expression matches the object(s) being checked.

Rule Application

Online DRC, Batch DRC, interactive routing and autorouting.